Файл:AD1845.pdf

Материал из РадиоВики - энциклопедии радио и электроники
Перейти к: навигация, поиск
Выкупить рекламный блок
Ссылка на страницу индекса

AD1845 CFMT

CC/L

Audio Data Type

0 0 1 1

0 1 0 1

Linear, 8-Bit Unsigned PCM µ-Law, 8-Bit Companded Linear, 16-Bit Twos Complement PCM A-Law, 8-Bit Companded Figure 12. Capture Audio Data Type

Crystal, Clock Select/Total Power-Down Register (IXA3:0 = 29) IXA3:0

Data 7

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

29

XFS2

XFS1

XFS0

res

res

res

res

TOTPWD

TOTPWD

Total Power Down. When TOTPWD = HI, the ADC, DAC, mixer, and voltage reference are powered down, and the ADC and DAC sample clocks are turned off. Only the digital interface remains active to allow the host to exit the AD1845 from the total power-down state.

res

Reserved for future expansion. Always write zeros to these bits.

XFS2:0

Crystal/Clock Input Frequency Select. On power up or reset, the AD1845 expects a 24.576 MHz input clock. If the clock source connected to the AD1845 is different from the default condition, then the clock input must be selected using this register. For a detailed explanation see the Power Up and Reset section of the data sheet. Figure 13 summarizes the valid input clock frequencies. Clock sources with excessive jitter may not yield optimal analog performance.

This register’s initial state after reset is “000x xxx0.” XFS2 0 0 0 0 1 1 1 1

XFS1 0 0 1 1 0 0 1 1

XFS0 0 1 0 1 0 1 0 1

Input Frequency 24.576 MHz 14.31818 MHz 24.000 MHz 25.000 MHz 33.000 MHz Reserved Reserved Reserved

Figure 13. Input Frequency Selection

Capture Upper Base Count Register (IXA3:0 = 30) IXA3:0

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

30

CUB7:0

Data 7 CUB7

CUB6

CUB5

CUB4

CUB3

CUB2

CUB1

CUB0

Capture Upper Base Count. This byte is the upper byte of the base count register containing the eight most significant bits of the second 16-bit base register. Reads from this register return the same value which was written. The current count contained in the counters can not be read.

This register’s initial state after reset is “0000 0000.” Capture Lower Base Count Register (IXA3:0 = 31) IXA3:0

Data 6

Data 5

Data 4

Data 3

Data 2

Data 1

Data 0

31

CLB7:0

Data 7 CLB7

CLB6

CLB5

CLB4

CLB3

CLB2

CLB1

CLB0

Capture Lower Base Count. This byte is the lower byte of the base count register containing the eight least significant bits of the second 16-bit base register. Reads from this register return the same value which was written. The current count contained in the counters cannot be read.

This register’s initial state after reset is “0000 0000.”

–28–

REV. B


1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
Перейти на страницу


Исходный файл(2550 × 3300 пикселей, размер файла: 327 КБ, MIME-тип: application/pdf, 40 страниц)

Importing file

История файла

Нажмите на дату/время, чтобы просмотреть, как тогда выглядел файл.

Дата/времяМиниатюраРазмерыУчастникПримечание
текущий16:49, 19 мая 2014Миниатюра для версии от 16:49, 19 мая 20142550 × 3300, 40 страниц (327 КБ)Maintenance script (обсуждение)Importing file
  • Вы не можете перезаписать этот файл.

Нет страниц, ссылающихся на данный файл.

Метаданные