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AD1845 VREF_F

GROUNDING AND LAYOUT

VREF

Analog Devices recommends a split ground plane as shown in Figure 34. The analog plane and the digital plane are connected directly under the AD1845. Splitting the ground plane directly under the SoundPort Codec is optimal because analog pins will be located above the analog ground plane and digital pins will be located directly above the digital ground plane for the best isolation.

10µF

0.1µF

10µF

Figure 30. Voltage Reference Bypassing

Figure 31 illustrates signal-path filtering capacitors, L_FILT and R_FILT. The AD1845 must use 1.0 µF capacitors; the AD1845 will not perform properly with 1000 pF capacitors. The 1.0 µF capacitors required by the AD1845 can be of any type. L_FILT

1.0µF

Other schemes may also yield satisfactory results. If the split ground plane recommended here is not possible, the AD1845 should be entirely over the analog ground plane with the optional 74_245 transceiver over the digital plane.

R_FILT

1.0µF

Figure 31. External Filter Capacitor Connections

The crystal shown in the crystal connection circuitry of Figure 32 should be 24.576 MHz, fundamental-mode and paralleltuned. Note that using the exact data sheet frequencies is not required and that external clock sources can be used to overdrive the AD1845’s internal oscillators. (See the description of the CFS2:0 control bits above.) If using an external clock source, apply it to the crystal input pins while leaving the crystal output pins unconnected. Attention should be paid to providing low jitter external input clocks. XTAL1O

XTAL1I

20–64pF

Some manufacturers of compatible devices differentiate between digital supply pins used to power internal logic and digital supply pins used to power the ISA bus driver. Their recommended layout suggests connecting the internal logic supply pins to the analog supply. A potential problem can occur if the layout connects digital supply pins to the analog supply. Connecting some of the digital supply pins to one supply and some of the digital supply pins to a different supply can create an internal short between the two different +5 V supplies. Analog Devices recommends that all digital pins be driven from the same supply. A common technique to achieve maximum performance is to use a +5 V regulator to power the analog side of the codec from the PC’s +12 V supply line, while the standard PC +5 V supply line powers the entire digital side of the codec. The separate supplies provide noise isolation for the analog side of the codec, and maximize performance of the AD1845.

20–64pF

24.576 MHz

DIGITAL GROUND PLANE

Figure 32. Crystal Connections

Note: XTAL2I and XTAL2O, are not used in the AD1845.

Good, standard engineering practices should be applied for power-supply decoupling. Decoupling capacitors should be placed as close as possible to package pins. If a separate analog power supply is not available, we recommend the circuit shown in Figure 33 for using a single +5 V supply. Ferrite beads suffice for the inductors shown. This circuitry should be as close to the supply pins as is practical. FERRITE/INDUCTOR 0.1µF

1µF 0.1µF

VDD

VDD

0.1µF

VDD

FERRITE/ INDUCTOR 0.1µF

0.1µF

0.1µF

VDD

0.1µF

VDD

0.1µF

VDD

0.1µF

VDD

1.6Ω 1µF

1µF

0.1µF

VCC

VCC

Figure 33. Recommended Power Supply Bypassing

REV. B

ANALOG R_AUX2 GROUND 43 PLANE

AD1845 PLCC

Analog Devices also recommends a pull-down resistor for PWRDWN.

+5V SUPPLY

GNDD 44

–35–

25 GNDD

DIGITAL GROUND PLANE

NC 52

NC 51

AD1845 TQFP 26 R_FILT

24 NC

25 R_FILT

Figure 34. Recommended Ground Plane

ANALOG GROUND PLANE


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