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AD546

Figure 28. Input Pin to Insulating Standoff

Leakage through the bulk of the circuit board will still occur with the guarding schemes shown in Figures 27a and 27b. Standard “G10” type printed circuit board material may not have high enough volume resistivity to hold leakages at the subpicoampere level particularly under high humidity conditions. One option that eliminates all effects of board resistance is shown in Figure 28. The AD546’s sensitive input pin (either Pin 2 when connected as an inverter, or Pin 3 when connected as a follower) is bent up and soldered directly to a Teflon* insulated standoff. Both the signal input and feedback component leads must also be insulated from the circuit board by Teflon standoffs or low-leakage shielded cable.

Table I. Insulating Materials and Characteristics

Material1

Minimal Triboelectric Effects

Minimal Resistance Piezoelectric to Water Effects Absorption

Teflon* Kel-F** Sapphire Polyethylene Polystyrene Ceramic Glass Epoxy PVC Phenolic

Contaminants such as solder flux on the board’s surface and on the amplifier’s package can greatly reduce the insulation resistance between the input pin and those traces with supply or signal voltages. Both the package and the board must be kept clean and dry. An effective cleaning procedure is to first swab the surface with high grade isopropyl alcohol, then rinse it with deionized water and, finally, bake it at 80°C for 1 hour. Note that if either polystyrene or polypropylene capacitors are used on the printed circuit board, a baking temperature of 70°C is safer, since both of these plastic compounds begin to melt at approximately +85°C.

Volume Resistivity (⍀–CM) 1017–1018 1017–1018 1016–1018 1014–1018 1012–1018 1012–1014 1010–1017 1010–1015 105–1012

W W M M W W W G W

W M G G M M M M G

G G G M M W W G W

G–Good with Regard to Property. M–Moderate with Regard to Property. W–Weak with Regard to Property. 1

Electronic Measurements, pp.15-17, Keithley Instruments, Inc., Cleveland, Ohio, 1977. *Teflon is a registered trademark of E.I. du Pont Co. **Kel-F is a registered trademark of 3M Company.

OFFSET NULLING

The AD546’s input offset voltage can be nulled by using balance Pins 1 and 5, as shown in Figure 29. Nulling the input offset voltage in this fashion will introduce an added input offset voltage drift component of 2.4 µV/°C per millivolt of nulled offset.

Other guidelines include making the circuit layout as compact as possible and reducing the length of input lines. Keeping circuit board components rigid and minimizing vibration will reduce triboelectric and piezoelectric effects. All precision high impedance circuitry requires shielding from electrical noise and interference. For example, a ground plane should be used under all high value (i.e., greater than 1 MΩ) feedback resistors. In some cases, a shield placed over the resistors, or even the entire amplifier, may be needed to minimize electrical interference originating from other circuits. Referring to the equation in Figure 26, this coupling can take place in either, or both, of two different forms—coupling via time varying fields: dV C dT P

or by injection of parasitic currents by changes in capacitance due to mechanical vibration: dCp V dT

Figure 29. Standard Offset Null Circuit

Both proper shielding and rigid mechanical mounting of components help minimize error currents from both of these sources. Table I lists various insulators and their properties.

The circuit in Figure 30 can be used when the amplifier is used as an inverter. This method introduces a small voltage in series with the amplifier’s positive input terminal. The amplifier’s

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REV. A