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AD607 PRODUCT OVERVIEW

40.2127 ms Timebase Memory 1 Timebase Memory 2 Timebase Delta T Start

= = = = =

40.2377 ms

5.00 µs/div 100.0 mVolts/div 5.00 µs/div 60.00 mVolts/div 5.00 µs/div 15.7990 µs 40.2327 ms

The AD607 provides most of the active circuitry required to realize a complete low power, single-conversion superheterodyne receiver, or most of a double-conversion receiver, at input frequencies up to 500 MHz, and with an IF of from 400 kHz to 12 MHz. The internal I/Q demodulators, and their associated phase locked-loop, which can provide carrier recovery from the IF, support a wide variety of modulation modes, including nPSK, n-QAM, and AM. A single positive supply voltage of 3 V is required (2.7 V minimum, 5.5 V maximum) at a typical supply current of 8.5 mA at midgain. In the following discussion, VP will be used to denote the power supply voltage, which will be assumed to be 3 V.

40.2627 ms

Delay = Offset = Delay = Offset = Delay =

40.2377 ms 154.0 mVolts 40.2377 ms 209.0 mVolts 40.2377 ms

Figure 33 shows the main sections of the AD607. It consists of a variable-gain UHF mixer and linear four-stage IF strip, which together provide a voltage controlled gain range of more than 90 dB; followed by dual demodulators, each comprising a multiplier followed by a 2-pole, 2 MHz low-pass filter; and driven by a phase-locked loop providing the inphase and quadrature clocks. An internal AGC detector is included, and the temperature stable gain control system provides an accurate RSSI capability. A biasing system with CMOS compatible power-down completes the AD607.

Stop = 40.2485 ms

Trigger on External at Pos. Edge at 40.0 mVolts

Figure 31. Power-Up Response Time to PLL Stable

SUPPLY CURRENT – mA

15

Mixer

The UHF mixer is an improved Gilbert cell design, and can operate from low frequencies (it is internally dcoupled) up to an RF input of 500 MHz. The dynamic range at the input of the mixer is determined, at the upper end, by the maximum input signal level of ± 56 mV between RFHI and RFLO up to which the mixer remains linear, and, at the lower end, by the noise level. It is customary to define the linearity of a mixer in terms of the 1 dB gain-compression point and third-order intercept, which for the AD607 are –15 dBm and –8 dBm, respectively, in a 50 Ω system.

10

5 0

0.5

1

1.5

2

2.5

GAIN VOLTAGE – Volts

Figure 32. Power Supply Current vs. Gain Control Voltage, GREF = 1.5 V LOIP

RFHI

VMID

IOUT

IFHI

MXOP BPF

IFOP RFLO

BPF OR LPF

DMIP

FDIN VQFO FLTR

VMID

IFLO

QOUT

MID-POINT BIAS GENERATOR

AGC DETECTOR GAIN/RSSI

VPS1 VPS2

PTAT VOLTAGE

BIAS GENERATOR

PRUP COM1

COM2

Figure 33. Functional Block Diagram

REV. 0

–13–

GREF

AD607


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