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AD607 of current exactly balances the 4.5 µA discharge current. (It makes no difference what the actual value of VG is at that point, since the AGC filter is an integrator.)

pass filter does. This “input” is an INCREASED AMPLITUDE required at IFOP. The AGC loop thus does not level the output at IFOP.

Thus, at 20 mV/dB

Reasons for Using a Larger AGC Capacitor

VRIPPLE =

IT C

=

4.5 µA × 93 ns 1 nF

1. In applications where gain modulation may be troublesome, raise the capacitor from 1 nF to 2.7 nF; the 80 dB slew time (at 20 mV/dB) is now close to 1 ms.

= 0.42 mV

This corresponds to 0.021 dB, and the ripple will modulate the gain by that amount over each cycle. The effect of such modulation on the signal is hard to quantify, but it roughly translates to a 2% amplitude modulation. Also, the gain ripple depends on the scale factor. For this example, at GREF = 1.23 V and a 16.4 mV/dB scale factor, the gain ripple increases to 0.025 dB. AGC Charge Time

When the gain is too high, the IF amplifier will be overdriven to produce a square wave output (roughly) of ± 560 mV. If perfectly square and time- and amplitude-symmetric, this would be sliced at the 300 mV level to generate a current of 76 µA/2, or 38 µA. After subtracting the 4.5 µA, we should have about 33 µA. In fact, the maximum ramp-up current is about 20 µA, because the waveform is not a crisp square wave (and as the loop approaches equilibrium it is more nearly sinusoidal). Thus, the ramp-up rate is 20/4.5 = 4.4 times faster than the discharge rate. In our example, a 1.6 V change will require about 1.5 ms using C = 1 nF. Applications Hints

Do not place a resistor from Pin 12 to Ground: The resistor converts the integrator—ideal for AGC—into a low-pass filter. An integrator needs no input to sustain a given output; a lowVPOS

C15 0.1µF

GND

3. In AM applications, the AGC loop must not track the modulation envelope. The objective should be that the gain should not vary by more than the amount required to introduce, say, 1% THD distortion at the lowest modulation frequency, say, 300 Hz. Note that in AM applications it is the modulation bandwidth that determines the required AGC filter capacitor, not the IF. 4. In some applications, even slower AGC may be desired than that required to prevent modulation tracking. AD607 EVALUATION BOARD

The AD607 evaluation board (Figures 46 and 47) consists of an AD607, ground plane, I/O connectors, and a 10.7 MHz bandpass filter. The RF and LO ports are terminated in 50 Ω to provide a broadband match to external signal generators to allow a choice of RF and LO input frequencies. The IF filter is at 10.7 MHz and has 330 Ω input and output terminations; the board is laid out to allow the user to substitute other filters for other IFs.

JUMPER R10 4.99kΩ

C11 10nF FDIN

2. As the IF is lowered, the capacitor must be increased accordingly if gain ripple is to be avoided. Thus, to achieve the same ripple at 455 kHz requires the 1 nF capacitor to be increased to 0.022 µF.

R11 OPEN

C12 0.1µF

R8 51.1Ω

C1 0.1µF FDIN COM1

C13 0 R7 51.1Ω C14 0

IOUT QOUT

LOIP C16 1nF

C9 1nF

RFLO

AD607

IFOP

MXOP

I C2 0.1µF

Q

GAIN IFLO

C4 47pF

COM2

VMID IFHI

R5

DMIP

GREF

R6 51.1Ω

1kΩ

VPS2

RFHI

RF

C3 10nF

R1

C10 1nF

LO

FLTR

PRUP

R9 0

PRUP

VPS1

R2 316Ω

JUMPER R4 0

332Ω

IF

R3 332Ω

C6 0.1µF

C7 1nF

RSSI

C5 1nF

C8 0.1µF

AD607 EVALUATION BOARD (AS RECEIVED) VPOS

VPOS R15 50kΩ

R13 50kΩ

R17 OPEN

FDIN

FDIN R14 51.1Ω

C17 10nF

FDIN

FDIN

R12 OPEN

R19 RSOURCE

C20 SHORT

R16 OPEN

VMID

VMID

MOD FOR LARGE MAGNITUDE AC COUPLED INPUT

MOD FOR DC COUPLED INPUT

Figure 46. Evaluation Board

REV. 0

R18 OPEN

C19 ANYTHING

C18 SHORT

–19–


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