Файл:AD7874.pdf

AD7874 Some applications may require that the conversion is initiated by the microprocessor rather than an external timer. One option is to decode the AD7874 CONVST from the address bus so that a write operation starts a conversion. Data is read at the end of the conversion sequence as before. Figure 16 shows an example of initiating conversion using this method. Note that for all interfaces, a read operation should not be attempted during conversion. AD7874–MC68000 Interface

An interface between the AD7874 and the MC68000 is shown in Figure 15. As before, conversion is initiated using an external timer. The AD7874 INT line can be used to interrupt the processor or, alternatively, software delays can ensure that conversion has been completed before a read to the AD7874 is attempted. Because of the nature of its interrupts, the 68000 requires additional logic (not shown in Figure 15) to allow it to be interrupted correctly. For further information on 68000 interrupts, consult the 68000 users manual.

AD7874–8086 Interface

Figure 16 shows an interface between the AD7874 and the 8086 microprocessor. Unlike the previous interface examples, the microprocessor initiates conversion. This is achieved by gating the 8086 WR signal with a decoded address output (different to the AD7874 CS address). The AD7874 INT line is used to interrupt the microprocessor when the conversion sequence is completed. Data is read from the AD7874 using the following instruction: MOV AX,ADC where AX is the 8086 accumulator and ADC is the AD7874 address. ADDRESS BUS

ADDR DECODE

8086

The MC68000 AS and R/W outputs are used to generate a separate RD input signal for the AD7874. CS is used to drive the 68000 DTACK input to allow the processor to execute a normal read operation to the AD7874. The conversion results are read using the following 68000 instruction: MOVE.W ADC,D0

ALE

LATCH

RD

RD DB11 DB0

AD15

TIMER

A15

ADDRESS/DATA BUS

ADDRESS BUS

AD0

A0

• ADDITIONAL PINS OMITTED FOR CLARITY ADDR DECODE EN

DTACK

Figure 16. AD7874–8086 Interface

CONVST CS

AD7874*

AS

RD

R/W DB11 DB0 D15 DATA BUS D0 *ADDITIONAL PINS OMITTED FOR CLARITY

Figure 15. AD7874–MC68000 Interface

REV. C

AD7874* CONVST

WR

where D0 is the 68000 D0 register and ADC is the AD7874 address.

MC68000

CS

–11–