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AD7874 CONVERTER DETAILS

EXTERNAL REFERENCE

The AD7874 is a complete 12-bit, 4-channel data acquisition system. It is comprised of a 12-bit successive approximation ADC, four high speed track/hold circuits, a four-channel analog multiplexer and a 3 V Zener reference. The ADC uses a successive approximation technique and is based on a fast-settling, voltage switching DAC, a high speed comparator, a fast CMOS SAR and high speed logic.

In some applications, the user may require a system reference or some other external reference to drive the AD7874 reference input. Figure 4 shows how the AD586 5 V reference can be used to provide the 3 V reference required by the AD7874 REF IN. +15V +VIN

Conversion is initiated on the rising edge of CONVST. All four input track/holds go from track to hold on this edge. Conversion is first performed on the Channel 1 input voltage, then Channel 2 is converted and so on. The four results are stored in on-chip registers. When all four conversions have been completed, INT goes low indicating that data can be read from these locations. The conversion sequence takes either 78 or 79 rising clock edges depending on the synchronization of CONVST with CLK. Internal delays and reset times bring the total conversion time from CONVST going high to INT going low to 32.5 µs maximum for a 2.5 MHz external clock. The AD7874 uses an implicit addressing scheme whereby four successive reads to the same memory location access the four data words sequentially. The first read accesses Channel 1 data, the second read accesses Channel 2 data and so on. Individual data registers cannot be accessed independently.

V IN1

7R*

TO INTERNAL COMPARATOR

GND VOUT

AD586

TRACK/HOLD 1

10kΩ REF IN

2.1R*

3R*

1kΩ TO ADC REFERENCE CIRCUITRY

15kΩ AGND

AD7874** *R = 3.6kΩ TYP **ADDITIONAL PINS OMITTED FOR CLARITY

Figure 4. AD586 Driving AD7874 REF IN TRACK-AND-HOLD AMPLIFIER

INTERNAL REFERENCE

The track-and-hold amplifier on each analog input of the AD7874 allows the ADC to accurately convert an input sine wave of 20 V p amplitude to 12-bit accuracy. The input bandwidth of the track/hold amplifier is greater than the Nyquist rate of the ADC even when the ADC is operated at its maximum throughput rate. The small signal 3 dB cutoff frequency occurs typically at 500 kHz.

The AD7874 has an on-chip temperature compensated buried Zener reference which is factory trimmed to 3 V ± 10 mV (see Figure 3). The reference voltage is provided at the REF OUT pin. This reference can be used to provide both the reference voltage for the ADC and the bipolar bias circuitry. This is achieved by connecting REF OUT to REF IN.

The four track/hold amplifiers sample their respective input channels simultaneously. The aperture delay of the track/hold circuits is small and, more importantly, is well matched across the four track/holds on one device and also well matched from device to device. This allows the relative phase information between different input channels to be accurately preserved. It also allows multiple AD7874s to sample more than four channels simultaneously.

VDD

TEMPERATURE COMPENSATION

AD7874

The operation of the track/hold amplifiers is essentially transparent to the user. Once conversion is initiated, the four channels are automatically converted and there is no need to select which channel is to be digitized.

VSS REF OUT

Figure 3. AD7874 Internal Reference ANALOG INPUT

The reference can also be used as a reference for other components and is capable of providing up to 500 µA to an external load. In systems using several AD7874s, using the REF OUT of one device to provide the REF IN for the other devices ensures good full-scale tracking between all the AD7874s. Because the AD7874 REF IN is buffered, each AD7874 presents a high impedance to the reference so one AD7874 REF OUT can drive several AD7874 REF INs.

The analog input of Channel 1 of the AD7874 is as shown in Figure 4. The analog input range is ± 10 V into an input resistance of typically 30 kΩ. The designed code transitions occur midway between successive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs, . . . FS – 3/2 LSBs). The output code is 2s complement binary with 1 LSB = FS/4096 = 20 V/4096 = 4.88 mV. The ideal input/output transfer function is shown in Figure 5.

The maximum recommended capacitance on REF OUT for normal operation is 50 pF. If the reference is required for other system uses, it should be decoupled to AGND with a 200 Ω resistor in series with a parallel combination of a 10 µF tantalum capacitor and a 0.1 µF ceramic capacitor.

–6–

REV. C


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