I2C-bus controlled YUV/RGB switch
The circuit contains two sets of inputs (see Fig.1). Both channels can receive RGB or YUV signals. Each set of inputs has its own synchronization input, which internally generates a pulse to clamp the inputs. The internal clamping pulse can also be controlled by a signal (e.g. a sandcastle pulse) applied to pin 24. The pulse will occur during the time that the signal at pin 24 is between 5.5 and 6.5 V. If both a sync signal and a pin 24 signal are used the signal should be applied to pin 24 via a 1 kΩ resistor.
The protocol for the devices in I2C-bus mode is shown in Fig.3. Table 1 BIT
MA2 MA1 MA0
address selection bits; see Table 2
channel selection bit; see Table 3
matrix selection bit; see Table 3
D5 to D3
gain control bits; see Table 4
fast switching priority bit; see Table 5
D1 and D0
output state control bits; see Table 6
The circuit can be controlled by an I2C-bus compatible microcontroller or directly by DC voltages. The fast switching input can be operated via pin 16 of the peritelevision connector.
MA2 to MA0
The outputs can be set in a high impedance OFF state, which allows the use of seven devices in parallel (I2C-bus mode).
RGB signals of Channel 2 can be matrixed to YUV signals.
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Protocol bit description
ACK STO MSA003
See Table 1.
Fig.3 I2C-bus protocol.
1995 Mar 07