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DC Coupled Demodulating 120 MHz Logarithmic Amplifier AD640 with an intercept (logarithmic offset) at 1 mV dc. An integral X10 attenuator provides an alternative input range of ± 7.5 mV to ± 2 V dc. Scaling is also guaranteed for sinusoidal inputs. The AD640B is specified for the industrial temperature range of –40°C to +85°C and the AD640T, available processed to MILSTD-883B, for the military range of –55°C to +125°C. Both are available in 20-pin side brazed ceramic DIPs or leadless chip carriers (LCC). The AD640J is specified for the commercial temperature range of 0°C to +70°C, and is available in both 20-pin plastic DIP (N) and PLCC (P) packages. This device is now available to Standard Military Drawing (DESC) number 5962-9095501MRA and 5962-9095501M2A.

FEATURES Complete, Fully Calibrated Monolithic System Five Stages, Each Having 10 dB Gain, 350 MHz BW Direct Coupled Fully Differential Signal Path Logarithmic Slope, Intercept and AC Response are Stable Over Full Military Temperature Range Dual Polarity Current Outputs Scaled 1 mA/Decade Voltage Slope Options (1 V/Decade, 100 mV/dB, etc.) Low Power Operation (Typically 220 mW at ؎5 V) Low Cost Plastic Packages Also Available APPLICATIONS Radar, Sonar, Ultrasonic and Audio Systems Precision Instrumentation from DC to 120 MHz Power Measurement with Absolute Calibration Wide Range High Accuracy Signal Compression Alternative to Discrete and Hybrid IF Strips Replaces Several Discrete Log Amp ICs

PRODUCT HIGHLIGHTS

PRODUCT DESCRIPTION

The AD640 is a complete monolithic logarithmic amplifier. A single AD640 provides up to 50 dB of dynamic range for frequencies from dc to 120 MHz. Two AD640s in cascade can provide up to 95 dB of dynamic range at reduced bandwidth. The AD640 uses a successive detection scheme to provide an output current proportional to the logarithm of the input voltage. It is laser calibrated to close tolerances and maintains high accuracy over the full military temperature range using supply voltages from ± 4.5 V to ± 7.5 V. The AD640 comprises five cascaded dc coupled amplifier/limiter stages, each having a small signal voltage gain of 10 dB and a –3 dB bandwidth of 350 MHz. Each stage has an associated full-wave detector, whose output current depends on the absolute value of its input voltage. The five outputs are summed to provide the video output (when low-pass filtered) scaled at 1 mA per decade (50 µA per dB). On chip resistors can be used to convert this output current to a voltage with several convenient slope options. A balanced signal output at +50 dB (referred to input) is provided to operate AD640s in cascade. The logarithmic response is absolutely calibrated to within ± l dB for dc or square wave inputs from ± 0.75 mV to ± 200 mV,

1. Absolute calibration of a wideband logarithmic amplifier is unique. The AD640 is a high accuracy measurement device, not simply a logarithmic building block. 2. Advanced design results in unprecedented stability over the full military temperature range. 3. The fully differential signal path greatly reduces the risk of instability due to inadequate power supply decoupling and shared ground connections, a serious problem with commonly used unbalanced designs. 4. Differential interfaces also ensure that the appropriate ground connection can be chosen for each signal port. They further increase versatility and simplify applications. The signal input impedance is ~500 kΩ in shunt with ~2 pF. 5. The dc coupled signal path eliminates the need for numerous interstage coupling capacitors and simplifies logarithmic conversion of subsonic signals. 6. The low input offset voltage of 50 µV (200 µV max) ensures good accuracy for low level dc inputs. 7. Thermal recovery “tails,” which can obscure the response when a small signal immediately follows a high level input, have been minimized by special attention to design details. 8. The noise spectral density of 2 nV/√Hz results in a noise floor of ~23 µV rms (–80 dBm) at a bandwidth of 100 MHz. The dynamic range using cascaded AD640s can be extended to 95 dB by the inclusion of a simple filter between the two devices.

FUNCTIONAL BLOCK DIAGRAM 1k

COM 18

RG0

RG1 17

16

1k 15 RG2

FULL-WAVE DETECTOR

FULL-WAVE DETECTOR

10db

ATN OUT 19

LOG 14 OUT

10db

13 LOG COM

INTERCEPT POSITIONING BIAS

FULL-WAVE DETECTOR

FULL-WAVE DETECTOR

10db

FULL-WAVE DETECTOR

10db

SIG +IN 20 SIG –IN

11 SIG + OUT

2

10db

1

ATN LO

12 +VS

10 AMPLIFIER/LIMITER

AMPLIFIER/LIMITER

AMPLIFIER/LIMITER

AMPLIFIER/LIMITER

SIG – OUT

AMPLIFIER/LIMITER

27 ATN COM 3 30

REV. A

ATN COM 4

270

ATN IN 5

9

–VS BL1 6

GAIN BIAS REGULATOR

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

7

SLOPE BIAS REGULATOR

BL2

8

ITC

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703


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