3 V/5 V, 450 µA 16-Bit, Sigma Delta ADC AD7715*
a FEATURES Charge-Balancing ADC 16 Bits No Missing Codes 0.0015% Nonlinearity Programmable Gain Front End Gains of 1, 2, 32 and 128 Differential Input Capability Three-Wire Serial Interface Ability to Buffer the Analog Input 3 V (AD7715-3) or 5 V (AD7715) Operation Low Supply Current: 450 A max @ 3 V Supplies Low-Pass Filter with Programmable Output Update 16-Pin SOIC/DIP
FUNCTIONAL BLOCK DIAGRAM REF IN(–)
CHARGING BALANCING A/D CONVERTER SIGMA-DELTA MODULATOR
PGA A = 1–128
The AD7715 features a differential analog input as well as a differential reference input. It operates from a single supply (+3 V or +5 V). It can handle unipolar input signal ranges of 0 mV to +20 mV, 0 mV to +80 mV, 0 V to +1.25 V and 0 V to +2.5 V. It can also handle bipolar input signal ranges of ± 20 mV, ± 80 mV, ± 1.25 V and ± 2.5 V. These bipolar ranges are referenced to the negative input of the differential analog input. The AD7715 thus performs all signal conditioning and conversion for a single-channel system. The AD7715 is ideal for use in smart, microcontroller or DSP based systems. It features a serial interface that can be configured for three-wire operation. Gain settings, signal polarity and update rate selection can be configured in software using the input serial port. The part contains self-calibration and system calibration options to eliminate gain and offset errors on the part itself or in the system.
MCLK IN MCLK OUT RESET
SERIAL INTERFACE REGISTER BANK
The AD7715 is a complete analog front end for low frequency measurement applications. The part can accept low level input signals directly from a transducer and outputs a serial digital word. It employs a sigma-delta conversion technique to realize up to 16 bits of no missing codes performance. The input signal is applied to a proprietary programmable gain front end based around an analog modulator. The modulator output is processed by an on-chip digital filter. The first notch of this digital filter can be programmed via the on-chip control register allowing adjustment of the filter cutoff and output update rate.
SCLK CS DIN DOUT DRDY
CMOS construction ensures very low power dissipation, and the power-down mode reduces the standby power consumption to 50 µW typ. The part is available in a 16-pin, 0.3 inch-wide, plastic dual-in-line package (DIP) as well as a 16-lead 0.3 inchwide small outline (SOIC) package. PRODUCT HIGHLIGHTS
1. The AD7715 consumes less than 450 µA in total supply current at 3 V supplies and 1 MHz master clock, making it ideal for use in low-power systems. Standby current is less than 10 µA. 2. The programmable gain input allows the AD7715 to accept input signals directly from a strain gage or transducer removing a considerable amount of signal conditioning. 3. The AD7715 is ideal for microcontroller or DSP processor applications with a three-wire serial interface reducing the number of interconnect lines and reducing the number of opto-couplers required in isolated systems. The part contains on-chip registers which allow software control over output update rate, input gain, signal polarity and calibration modes. 4. The part features excellent static performance specifications with 16-bits no missing codes, ± 0.0015% accuracy and low rms noise (<550 nV). Endpoint errors and the effects of temperature drift are eliminated by on-chip calibration options, which remove zero-scale and full-scale errors.
- Protected by U.S. Patent No: 5,134,401. See page 30 for data sheet index.
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