Файл:AD7730.pdf
![]() Размер этого JPG-превью для исходного PDF-файла: 1280 × 1656 пикселей. Другие разрешения: 320 × 414 пикселей | 800 × 1035 пикселей | 2550 × 3300 пикселей. a Bridge Transducer ADC AD7730 KEY FEATURES Resolution of 230,000 Counts (Peak-to-Peak) Offset Drift: 5 nV/؇C Gain Drift: 2 ppm/؇C Line Frequency Rejection: >150 dB Buffered Differential Inputs Programmable Filter Cutoffs Specified for Drift Over Time Operates with Reference Voltages of 1 V to 5 V GENERAL DESCRIPTION ADDITIONAL FEATURES Two-Channel Programmable Gain Front End On-Chip DAC for Offset/TARE Removal FAST Step™* Mode AC or DC Excitation Single Supply Operation The part features two buffered differential programmable gain analog inputs as well as a differential reference input. The part operates from a single +5 V supply. It accepts four unipolar analog input ranges: 0 mV to +10 mV, +20 mV, +40 mV and +80 mV and four bipolar ranges: ± 10 mV, ±20 mV, ± 40 mV and ± 80 mV. The peak-to-peak resolution achievable directly from the part is 1 in 230,000 counts. An on-chip 6-bit DAC allows the removal of TARE voltages. Clock signals for synchronizing ac excitation of the bridge are also provided. The AD7730 is a complete analog front end for weigh-scale and pressure measurement applications. The device accepts lowlevel signals directly from a transducer and outputs a serial digital word. The input signal is applied to a proprietary programmable gain front end based around an analog modulator. The modulator output is processed by a low pass programmable digital filter, allowing adjustment of filter cutoff, output rate and settling time. APPLICATIONS Weigh Scales Pressure Measurement The serial interface on the part can be configured for three-wire operation and is compatible with microcontrollers and digital signal processors. The AD7730 contains self-calibration and system calibration options, and features an offset drift of less than 5 nV/°C and a gain drift of less than 2 ppm/°C. The part is available in a 24-pin plastic DIP, a 24-lead SOIC and 24-lead TSSOP package. FUNCTIONAL BLOCK DIAGRAM AVDD REF IN(–) DVDD REF IN(+) AD7730 REFERENCE DETECT VBIAS AVDD AIN1(+) 100nA AIN1(–) SIGMA-DELTA A/D CONVERTER BUFFER + MUX +/– SIGMADELTA MODULATOR PGA PROGRAMMABLE DIGITAL FILTER 100nA AIN2(+)/D1 AIN2(–)/D0 AGND 6-BIT DAC SERIAL INTERFACE AND CONTROL LOGIC CLOCK GENERATION REGISTER BANK ACX SYNC MCLK IN MCLK OUT SCLK CS CALIBRATION MICROCONTROLLER ACX STANDBY DIN AC EXCITATION CLOCK DOUT AGND DGND POL RDY RESET
REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997
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