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Philips Semiconductors

Preliminary specification

Synchronization circuit with synchronized vertical divider system for 60 Hz



Vertical part

Synchronization and horizontal part

• fV = 60 Hz (M) system

• Horizontal sync separator and noise inverter

• Vertical synchronization pulse separator without external components and two integration times

• Horizontal oscillator

• Zener diode reference voltage source for the vertical sawtooth generator and vertical comparator

• Horizontal output stage • Horizontal phase detector (sync to oscillator)

• Divider system with three different reset enable windows

• Triple current source in the phase detector with automatic selection

• Synchronization is set to 528 divider ratio when no vertical sync pulse and no video transmitter is identified

• Normal phase detector time constant is increased to fast during the vertical blanking period (external switching for VTR conditions not necessary)

• Divider window is forced to wide window when a vertical sync pulse is detected within the window provided by reset divider and end of vertical blanking period, on condition that the voltage on pin 18 is ≤1.2 V

• Slow phase detector time constant and gated sync pulse operation are automatically switched on by an internal sync pulse noise level detection circuit

• Divider ratio is 528 (fV = 60 Hz) for DC signal on pin 5 • Linear negative-going sawtooth generated via the divider system (no frequency adjustment)

• Fast phase detector time is switched on for locking • Time constant externally switchable

• Comparator with low DC level feedback signal

• Inhibit of horizontal phase detector and video transmitter identification circuit during equalizing pulses and vertical sync pulse

• Output stage driver • fV = 60 Hz identification output combined with mute function

• Inhibit of horizontal phase detector during separated vertical sync pulse

• Start of vertical blanking is shifted to the start of the prequalizing pulses when the divider ratio is between 522 and 528 lines per picture

• Second phase detector for storage compensation of the line output stage

• Guard circuit which generates the vertical blanking pulse level on the sandcastle output pin 17 when the feedback level at pin 2 is not within the specified limits.

• 3-level sandcastle pulse generator • Automatic adaption of the burst key pulse width • Video transmitter identification circuit • Stabilizer and supply circuit for starting the horizontal oscillator and output stage directly from the mains rectifier

GENERAL DESCRIPTION The TDA2579C is an integrated circuit generating all requirements for synchronization of its horizontal oscillator and output stage plus those of the vertical part which comprises a divider system, sawtooth generator, comparator and output stage. The TDA2579C is almost identical to the TDA2579B. It is optimized for the M (60 Hz) TV system.

• Horizontal output current with constant duty factor value of 55% • Duty factor of the horizontal output pulse is 55% when the horizontal flyback pulse is absent.












January 1994


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