AD607 As noted earlier, the gain in dB is reduced linearly with the voltage VG on the GAIN pin. Figure 43 shows how the mixer and IF strip gains vary with VG when GREF is connected to VMID (1.5 V) and a supply voltage of 3 V is used. Figure 44 shows how these vary when GREF is connected to a 1.23 V reference.
77µA LAST IF STAGE IC2
1.5V + 316mV
TO INTERNAL GAIN CONTROL
AVERAGE OF IC2 IS FORCED TO 4.5µA BY INTEGRATION IN CAGC
COMM 30dB (21.5dB)
Figure 45. Simplified Schematic of AGC Detector
Acting against this is an internally generated 4.5 µA pull-down current, which operates to within a few millivolts of ground. As VG, the voltage at the GAIN/RSSI pin, rises, the gain falls, so reducing the amplitude of the IF output and reducing the amplitude of the current spike in Q2; eventually a point is reached where its average collector current is balanced by the pull-down current, and the charging ceases. It will be apparent that the loop filter is essentially a perfect integrator.
1.8V 1V NORMAL OPERATING RANGE
Figure 43. Gain Distribution for GREF = 1.5 V 90dB
This simple system can be used because the input impedance of the gain-control system, also internally tied to the GAIN/RSSI pin, is several megohms, and its bias current is small. The voltage VG may be used as an RSSI output; however, if it is to be heavily loaded, a buffer amplifier must be used.
Note that, unlike a post-demodulation AGC detector (via DSP), this scheme responds to signal plus noise. Thus, when operating at high gains, the AGC loop will “see” a substantial output at the IFOP node, even though a filter may be added by the user between the pins IFOP and DMIP. This will trick the loop into lowering the gain until the composite output signal (IF plus noise) reaches the reference level and satisfies the averagecurrent requirement. In these circumstances, the wanted signal will be smaller than expected. Thus, the internal AGC system will result in a slight compression of the demodulated output for very small signal levels.
40dB 30dB (21.5dB)
1V NORMAL OPERATING RANGE
Figure 44. Gain Distribution for GREF = 1.23 V
AGC Discharge Time
Using the Internal AGC Detector
The AD607 includes a detector cell at the output of the IF amplifier that allows it to provide its own AGC and output-leveling function in receiver applications where DSP support is not needed. It is only necessary to connect a filter capacitor between the GAIN pin and ground to invoke this feature. The voltage appearing on this pin may then be used as an RSSI output, with the scaling discussed earlier; note particularly that the voltage on GREF continues to determine this scaling. Figure 45 shows a simplified schematic of the detector. Transistor Q2 remains cut off by a 300 mV bias (when VP = 3 V; in general, ≈ VP/10) until the positive tip of the IF waveform causes it to briefly conduct, charging the AGC filter capacitor CAGC in a positive direction. The voltage across this capacitor is VG.
The discharge current is approximately 4.5 µA; thus, to restore gain in the event of a rapid drop-out requires a time of T = C × VG/4.5 µA. Using a 1 nF capacitor, and noting that an 80 dB gain change corresponds to 1.6 V, the discharge time is 355 µs. Note, however, that when GREF is tied to a different value, the scaling changes. For GREF = 1.23 V, the scale factor is 16.4 mV/dB, 80 dB corresponds to a 1.312 V change, and the discharge time decreases to 290 µs. VG could also be expressed in dB: with a scaling of 20 mV/dB, it works out to T = C × P × 44,000, where P is the change in input power, expressed in dB. Thus, using C = 1 nF, checking the time needed for 80 dB we get T = 355 µs. For the case where the scaling is 16.4 mV/dB, T = C × P × 36,000. The AD607’s AGC detector delivers only one brief charging pulse per cycle of the IF. At a 10.7 MHz IF, for example, this is every 93 ns. When the AGC system is in equilibrium, this pulse