AD607 In operation (Figure 48), the AD607 evaluation board draws about 8.5 mA at midgain (59 dB). Use high impedance probes to monitor signals from the demodulated I and Q outputs and the IF output. The MGC voltage should be set such that the signal level at DMIP does not exceed ± 150 mV; signal levels above this will overload the I and Q demodulators. The insertion loss between IFOP and DMIP is typically 3 dB if a simple low-pass filter (R8 and C2) is used and higher if a reverseterminated bandpass filter is used.
If the AD607’s internal AGC detector is used, then the GAIN/ RSSI (Pin 12) becomes an output and the RSSI voltage appears across C12, which serves as an integrating capacitor. This voltage must be monitored by a high impedance (100 kΩ minimum) probe. The internal AGC loop holds the IF voltage at IFOP (Pin 14) at ± 300 mV; in this application, about 6 dB of attenuation is needed between pins IFOP and DMIP to avoid overloading the I and Q demodulators.
HP 6632A PROGRAMMABLE POWER SUPPLY 2.7V–6V
FLUKE 6082A SYNTHESIZED SIGNAL GENERATOR 240 MHz
HP 3326 SYNTHESIZED SIGNAL GENERATOR 10.710 MHz
MCL ZFSC–2–1 COMBINER
HP 8656A SYNTHESIZED SIGNAL GENERATOR 240.02 MHz
I OUTPUT RF
AD607 EVALUATION BOARD LO
HP 9920 IEEE CONTROLLER HP9121 DISK DRIVE
HP 8656A SYNTHESIZED SIGNAL GENERATOR 229.3 MHz
TEKTRONIX 11402A OSCILLOSCOPE WITH 11A32 PLUGIN
DATA PRECISION DVC8200 PROGRAMMABLE VOLTAGE SOURCE
IEEE –488 BUS
Figure 48. Evaluation Board Test Setup